MU CPU HOME PAGE

Overview

The MU CPU is an easy to understand design that is built out of simple logic gates, flip-flops, and other logic devices found within the freeware Softronics Multimedia Logic simulator software.

Students enrolled in Mansfield University's Computer Organization course learn to build a working CPU at the logic gate level. They then write a variety of assembly language programs that run on the CPU.

Getting Started Documentation

The following two documents give an overview of the CPU:

Phillips, John, Simulation of a Simple CPU Design and its Use as an Instructional Tool in a Computer Organization Course, CCSCNE 2007 Paper **, to be published. This paper gives a brief overview of the MU CPU and my experience using it in a Computer Organization course.

Phillips, John, MU CPU 2006: Design and Implementation Report, class handout. This guide gives a more detailed overview of the CPU design.

Phillips, John, CCSCNE 2007 Presentation, April, 21, 2007. This web page is an outline of the presentation given at the CCSCNE-2007 conference.

To operate the CPU you will first need to download the Softronics Inc. Multimedia Logic simulator that is freely available at http://www.softronix.com/logic.html. This is an easy-to-learn visual tool that allows drag and drop wiring of electronic circuits containing logic gates, flip-flops, switches, LEDs, and various other electronic components. You can then run the simulator and interact with the circuit in real time as if you had built the physical version.

Next download the MU CPU 2006 file named cpu2006a.lgi. You run the MMLogic program and then open this file containing the CPU circuitry. Before running the simulation you will need to load a program into the CPU's RAM. Move to page three of the circuit and double click on the RAM device. Load the ex1.txt sample program. Return to page one and run the simulation. The program counts from zero to FF (hexadecimal) and then repeats forever.

testadd.txt - this program counts down from 25h.

multiply.txt - this program multiplies two 8-bit numbers through successive addition and gets an 8-bit result.

Sample Homework Problems

1. Add an OUT instruction (opcode 00) and an 8-bit output port onto the CPU circuit with LEDs attached. Write a program that counts in binary on the LEDs. Add an ASCII display device to the output port. Write a program to print out "Hello Name " where Name is your first name.

A partial solution is shown in cpu2006b.lgi and can be tested with this porttest.txt program. After starting the simulation move to page 4 to see the output on the LEDs and display.

2. Write a program that will add two 16-bit numbers together and display the low-order byte on the output port LEDs and the high-order byte on the Accumulator LEDs.

3. Write a program that will multiply two small 8-bit numbers such that the result will be less than 256. Do the multiplication by successive addition. For example, 8*3 would be the same as 8+8+8.

The machine code solution is shown in multiply.txt.

4. Write a program that multiplies two 8-bit numbers together and then stores the 16-bit result in RAM. Next read back the 16-bit result and write the upper 8-bits to the output port LEDs and place the lower 8-bits in the Accumulator. Then halt.

5. Add a hardware MUL (multiply) instruction (opcode 24) and circuitry to enable this operation in the ALU. Write a test program that demonstrates this operation working correctly.

5. Write a program in the language of your choice that will serve as a simple assembler for the MU CPU instruction set.

Selected Student Projects

The following are a few of my favorite student projects based on this CPU.

MU CPU 2002 Schematic Drawing - Nick Andre used AutoCAD to draw the complete circuit and then print it on large format paper. AutoCAD web version--this may ask you to download an ActiveX control from AutoDesk.

MU CPU 2006 Address Bus Expansion - Brandon Valero expanded the address bus from 8 bits to 16 bits and then upgraded the RAM from a 256 byte device to a 64 K byte device. Revised MMLogic MU CPU. Brandon's report.

MU CPU 2006 Write to Disk Instruction - Jesse Robinson added an MMLogic output device to the CPU. This allows the CPU to write data to various devices such as disk drives and USB Flash drives. A new WRT instruction was created (opcode 12) and a test program written to demonstrate this device. Revised MMLogic MU CPU. Jesse's report. The program add8wrt.txt adds 2 numbers together and writes the result to a file named wrt.txt. Be sure to double click the file cabinet icon on page 5 to set where the data file will be written.

MU CPU 2006 Instruction Set Improvements - Aaron Clark added several very useful new instructions including a less than comparison, an equal comparison, and a jump on comparison. These instructions greatly simplify the coding conditional branches that underlie loops and decision statements. In addition, he added multiply and divide instructions taking advantage of the advanced capabilities of the MMLogic ALU used in the CPU design. Revised MMLogic MU CPU. Aaron's report. Sample program source listing. Sample program machine code.

MU CPU 2006 Web-based Assembler - Milton Clark developed a web-based assembler using the PHP programming language. Run the online assembler with the following test program:

LOD A, [D1]
ADD A, [D2]
HLT
D1: DB 3
D2: DB 4

Older Versions

The MU CPU 2003: Design and Implementation Report describes this version of the CPU. It is very similar to the current 2006 version except MMLogic at the time did not support Edge-triggered D-type flip-flops with Preset and Clear. Therefore, the program counter was implemented using simple logic gates, taking 6 additional pages of circuitry. This CPU implements the instruction set described in Petzold's CODE book. The instruction set includes: 10=LOD, 11=STO, 20=ADD, 21=SUB, 22=ADC, 23=SBB, 30=JMP, 31=JZ, 32=JC, 33=JNZ, 34=JNC, and FF=HLT. cpu2003c.lgi is the basic CPU. cpu2003d.lgi adds on a hardware multiply instruction. Here are some sample programs:

• ex1.txt is an infinite loop that counts from zero upwards
• newloop.txt is an infinite loop that counts downward from 5

MU CPU 2002 is an interesting design with several different input output peripheral devices. I later moved away from this design due to its complexity. The circuit is contained in cpu2002d.lgi. On the 3rd page double click on the ROM and load in a program. It maintains the same instruction set as that in the 2001 version. Here are some sample programs:

• disp1.txt is an infinite loop that counts from zero upwards and displays the ASCII equivalent code on the display
• hellojohnmc.txt writes out HELLO JOHN on the display. hellojohnasm.txt is the assembly language source code this program.
• kbdisp2.txt will echo what you type on the keyboard to the ASCII display. After running the program double click on the keyboard icon to activate the keyboard input.

MU CPU 2001 is my first attempt to implement a version of Petzold's CODE CPU design. The circuit is contained in cpu1i.lgi. It is the simplest circuit and only supports 8 instructions. These instructions use different opcodes than what the CODE book described so that I could do the simplest instruction decoding possible. Hence, the instruction set is: 01=LOD, 02=STO, 04=ADD, 08=ADC, 10=JMP, 20=JZ, 40=JC, and 80=HLT. On the second page double click on RAM to load in a program. Here is a sample program to try:

• testjz.txt counts down from 9 and then halts